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PRELIMINARY CM4072 Low Noise Charge Pump/Linear Regulator LED Driver
Features
* * * * * * * * * * Low noise regulator with integrated charge pump voltage-booster 5V output with input voltage as low as 2.8V Charge pump can also power an external LDO Low noise in 20Hz to 20kHz audio band Up to 200mA continuous output current Low operating and shutdown currents Stable with low-ESR ceramic or tantalum capacitors Over-current and over-temperature protection 10-lead TDFN package, 3mm x 3mm Lead-free versions available
Product Description
The CM4072 Low-noise Charge Pump / LDO Regulator is designed to power white backlight LEDs used in main displays or camera flash LEDs in wireless handsets. The 5V output provides up to 100mA continuous current for input voltages from 3.0V to 5.5V, and up to 200mA for a narrower range. This is accomplished with an integrated charge pump that boosts the input voltage before feeding it to an internal LDO linear regulator. The CM4072 operates with excellent power supply ripple rejection while maintaining good power efficiency. The device utilizes two external capacitors and operates at 250kHz. Separate analog and digital ground pins are provided for the charge pump and the rest of the circuitry to eliminate ground noise feed-through from the charge pump to the regulated output. The CM4072 provides both overcurrent and thermal overload protection. Two enable inputs provide flexibility in powering down the device. To maximize power saving in shutdown mode, both enable inputs should be at a logic low level. For applications that require the 5V output to be re-established with minimum delay after shutdown, the charge pump can be left enabled while the regulator is disabled. The CMOS LDO regulator features low quiescent current even at full load, making it very suitable for power sensitive applications. A bypass pin is provided to further minimize noise by connecting an external capacitor between this pin and ground. The CM4072 is available in a 10-lead TDFN package, with optional lead-free finishing, and is ideal for space critical applications.
Applications
* * * * White backlight LEDs for main display in wireless handsets and LCD modules Power flash LEDs for camera phones 3.3V to 5V conversion in PCMCIA cards, PCI Express Cards, other applications needing 5V 5V analog supply for audio codec in notebook computers, PDAs, MP3 players, etc
Typical Application
Simplified Block Diagram
DGND
VIN
1
CHARGE PUMP
10
2 9 3
CPCP CP+
1 VIN
CS + 2.2F
10 9
2 3 4 5
0.1F* *Optional
CP + 1F
VCP
CM4072 TDFN-10
CS EN_CP EN_LDO
7 6
8 7 6
ENABLE CHARGE PUMP
CONTROL CIRCUIT
CS
CBYP
+
ENABLE LDO
VREF
LDO
8
VOUT
PWM 0-200kHz
5
4
BYP
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
GND
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
1
PRELIMINARY CM4072
PACKAGE / PINOUT DIAGRAM
(Pins Down View)
10 9 8 7 6
TOP VIEW
BOTTOM VIEW
(Pins Up View)
12345
Pin 1 Marking
CM407 250xx
12345
GND PAD
10 9 8 7 6
Note: This drawing is not to scale.
CM4072-50DF/DE 10 Lead TDFN Package
PIN DESCRIPTIONS
LEAD(S) 1 2 NAME DGND VIN DESCRIPTION Ground for the charge pump circuit. This should be connected to the system (noisy) ground. Input power source for the device. Since the charge pump draws current in pulses at the 250kHz internal clock frequency, a low-ESR input decoupling capacitor is usually required close to this pin to ensure low noise operation. Charge pump output which is connected to the external reservoir capacitor CS. This should be a low-ESR capacitor. When the voltage on this pin reaches about 5.8V then the charge pump pauses until the voltage on this pin drops to about 5.7V. This gives rise to at least 100mV of 'ripple' (the frequency and amplitude of this ripple depends upon values of CP and CS and also the ESR of CS). Ground reference for all internal circuits except the charge pump. This pin should be connected to a "clean" low-noise analog ground Bypass input connected to the internal voltage reference of the LDO regulator. An external bypass capacitor CBYP of 0.1uF is recommended to minimize internal voltage reference noise and maximize power supply ripple rejection. EN_LDO (pin 6) and EN_CP (pin 7) are active-high TTL-level logic inputs to enable the linear regulator and charge pump according to the following truth table:
EN_CP (Pin 7) 1 1 0 0 EN_LDO (Pin 6) 1 0 1 0
3
VCP
4 5
GND BYP
6, 7
EN_LDO, EN_CP
CHARGE PUMP Enabled Enabled Disabled Disabled
REGULATOR Enabled Disabled Disabled Disabled
8
VOUT
The regulated output. An output capacitor may be added to improve noise and load-transient response. When the LDO regulator is disabled, an internal pull-down with a nominal resistance of 50 ohms is activated to discharge the VOUT rail to GND CP+ (pin 9) and CP- (pin 10) are used to connect the external "flying" capacitor CP to the charge pump. The charge stored in CP is transferred to the reservoir capacitor CS at the 250kHz internal clock rate.
9, 10
CP+, CP-
(c) 2005 California Micro Devices Corp. All rights reserved.
2
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
11/08/05
PRELIMINARY CM4072
Ordering Information
PART NUMBERING INFORMATION
Standard Finish Leads 10 Package TDFN-10 Ordering Part Number1 CM4072-50DF Part Marking CM407 250DF Lead-free Finish Ordering Part Number1 CM4072-50DE Part Marking CM407 250DE
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER ESD Protection (HBM) VEN Logic Input Voltage VIN, VOUT Pin Voltages Storage Temperature Range Operating Temperature Range Ambient Junction RATING UNITS V V V C C C
2000
(VIN + 0.5) to (GND - 0.5) +5.5 to (GND - 0.5) -65 to +150 -40 to +85 -40 to +150
STANDARD OPERATING CONDITIONS
PARAMETER Input Voltage Range (VIN) Ambient Operating Temperature VALUE 2.8 to 5.5 -40 to +85 200 (approx.) 0 to 200 0.1 0 to 100 UNITS V C C/W mA F F
JA of TDFN package on PCB
Output Load Current (IOUT) CBYP COUT
RECOMMENDED EXTERNAL COMPONENTS
DEVICE CS CP VALUE 2.2 1.0 UNITS F F
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
3
PRELIMINARY CM4072
Specifications (cont'd)
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL VCP VOUT VR LOAD VR LINE RDISCHG IGND PARAMETER Charge Pump Output Voltage Regulator Output Voltage Load Regulation Line Regulation VOUT Discharge Resistance LDO Regulator Ground Current via the GND pin CONDITIONS VOUT = 5V, 1mA < IOUT < 100mA VIN = 4.0V, 1mA < IOUT < 100mA IOUT = 1mA to 100mA Vary VIN from 3.0V to 5.0V LDO regulator disabled, EN_LDO grounded, VIN = 5V Shutdown (EN_LDO grounded) Regulator Enabled, IOUT = 0mA Regulator Enabled, IOUT = 100mA IDGND PSRR Charge Pump Shutdown Current via DGND pin Power Supply Ripple Rejection EN_CP grounded, VIN = 5V IOUT = 100mA, CBYP =0.1F, Note 2 f = 100Hz f = 10kHz BW=22Hz-22kHz, COUT = 10F, CBYP = 0.1F, IOUT = 100mA, Note 2 BW=22Hz-22kHz, CP = 1F, CS =3F, COUT = CBYP = 0.1F, IOUT = 100mA, Note 2 VIH VIL ILIM ISC TJSD THYS EN_CP, EN_LDO Input High Threshold EN_CP, EN_LDO Input Low Threshold Overload Current Limit Output Short Circuit Current Thermal Shutdown Junction Temperature Thermal Shutdown Hysteresis VIN = 5.0V VIN = 5.0V LDO Only, Note 2 LDO Only, Note 2 200 300 50 170 25 2.0 0.5 MIN 5.5 4.85 0.2 0.02 500 1 180 180 1 10 10 TYP 5.8 MAX 7 5.15 UNITS V V % % A A A A
42 42 35 38
dB dB Vrms Vrms
eNO
Output Voltage Noise
V V mA mA C C
Note 1: Unless otherwise noted, electrical operating characteristics are specified with TA = 0 to 70C, VIN = 5.0V, IOUT =100mA, COUT=10F, CP = 1F, CS = 10F. Note 2: These parameters are guaranteed by design and characterization.
(c) 2005 California Micro Devices Corp. All rights reserved.
4
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
11/08/05
PRELIMINARY CM4072
Performance Information
p
1.00E-03
1.00E-04
Voltage [V]
1.00E-05
noise floor Cs=1.5uF
1.00E-06
1.00E-07
1.00E-08 10 100 1000 Frequency [Hz] 10000 100000
Note: Noise peaks may appear for different values of CP, CS & IOUT, and are due to the ripple frequency of the charge pump (see later).
Figure 1. CM4072 Noise Spectrum ( TA = 25C, CP=0.47F, CS = 1.5F, COUT = 10F, CBYP = 0.1F, IOUT =100mA )
70.0 60.0 50.0
PSRR [dB]
40.0 30.0 20.0 10.0 0.0 10 100 1000 Frequency [Hz] 10000 100000
Measured by forcing VIN voltage to 3.3V & 5.0V dc, then sweeping 100mV ac on VIN. COUT = 10F, CBYP = 0.1F.
Figure 2. CM4072 PSRR (upper curve with VIN = 3.3V, lower curve with VIN = 5V, IOUT = 100mA both cases)
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
5
PRELIMINARY CM4072
Performance Information (cont'd)
Typical DC Characteristics (TA=25C, CP=1.0F, CS=10F, CBYP=0.1F, COUT=10F unless otherwise noted)
5.1 5.08 5.06 5.04
2 1.9 1.8 1.7
VOUT [V]
5 4.98 4.96 4.94 4.92 4.9 0 20 40 60 80 100
VEN [V]
5.02
1.6 1.5 1.4 1.3 1.2 1.1 1 3 3.5 4 4.5 5 5.5
IOUT [mA]
VIN [V]
Figure 3. VOUT vs. IOUT (VIN = 5V)
5.1 5.08 5.06 5.04 IOUT = 0mA IOUT = 100mA
Figure 7. VEN Threshold vs. VIN
300 250 200
VOUT [V]
IIN [A]
3 3.5 4 4.5 5 5.5
5.02 5 4.98 4.96 4.94 4.92 4.9
150 100 50 0 3 3.5 4 4.5 5 5.5
VIN [V]
VIN [V]
Figure 4. VOUT vs. VIN
7 6.75 6.5
200 250
Figure 8. IIN vs. VIN
VCP [V]
6 5.75 5.5 5.25 5 3 3.5 4 4.5 5 5.5
IIN [mA]
6.25
150
100 V_IN=3.1V V_IN=5V
50
0 0 20 40 60 80 100
VIN [V]
IOUT [mA]
Figure 5. CS Pin vs. VIN
at T=150'C, T=85'C and T=25'C
400 300
6 5
Figure 9. IIN vs. IOUT
VDO [mV]
VOUT [V]
15 T A=
0C
C
4 3 2 1
200 100
25 TA=
TA=85C
0 0 10 20 30 40 50 60 70 80 90 100
0 0 0.1 0.2
IOUT [A]
0.3
0.4
0.5
IOUT [mA]
Figure 6. Dropout Voltage (LDO Only)
(c) 2005 California Micro Devices Corp. All rights reserved.
Figure 10. Overcurrent Characteristic (LDO only)
6
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
11/08/05
PRELIMINARY CM4072
Performance Information (cont'd)
Transient Characteristics (TA=25C, CP=1.0F, CS=10F, CBYP=0.1F, COUT=10F unless otherwise noted)
Figure 11. Load Regulation (0mA to 100mA)
Figure 14. Cold Start / Power-Up
Figure 12. Load Regulation (2mA to 100mA)
Figure 15. LDO Power-Up
Figure 13. Line Regulation
Figure 16. LDO Power-Down
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
7
PRELIMINARY CM4072
Performance Information (cont'd)
Transient Characteristics (TA=25C, VIN=5V, CP=1.0F, CS=10F, CBYP=0.1F, COUT=10F unless otherwise noted)
5.10
5.05
I_OUT=0
VOUT [V]
5.00
I_OUT=30mA I_OUT=75mA I_OUT=100mA I_OUT=150mA
4.95
4.90 -50 -25 0 25 50 75 100 125 150 Temperature [C]
Figure 17. VOUT with VIN = 5V
5
5.1 5.05
4.5 4 3.5
Current [A]
-25 0 25 50 75 100 125
5
VOUT [V]
3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 Temperature [C]
4.95 4.9 4.85 4.8 -50
Temperature [C]
Figure 18. VOUT with VIN=3.0V, IOUT=100mA
1.65 1.645 1.64 1.635
Figure 20. IIN Leakage Current (Pins 6,7=0V)
3 2.5
V_IN Voltage [V]
VBYP [V]
1.63 1.625 1.62 1.615 1.61 1.605 1.6 -50 -25 0 25 50 75 100 125 150 Temperature [C]
2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 Temperature ['C]
Figure 19. Bypass Pin Voltage
(c) 2005 California Micro Devices Corp. All rights reserved.
Figure 21. Undervoltage Lockout
8
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
11/08/05
PRELIMINARY CM4072
Application Information
Ripple Frequency The charge pump internal oscillation frequency is about 250kHz. However, this is the continuous, freerunning frequency, which is usually only seen while the charge pump is powering up. Such a sawtooth 'ripple' waveform on CS can have a much lower frequency than 250kHz. This mode of operation is necessary to conserve power. If it were not done this way, then a much larger package with heatsink would be required. The frequency of this 'ripple' is affected by VIN, IOUT, CS capacitor value and CP capacitor value. Guidelines for External Capacitors (1) To find CP: specify value of VIN, and highest value of IOUT: If VIN= 3.3V +/- 5%, then minimum value of CP (F) = IOUT (mA) / 85. If VIN= 5.0V +/- 10%, then minimum value of CP (F) = IOUT (mA) / 700 (2) The VIN decoupling capacitor, CIN, should typically be much greater than CP to prevent voltage droop during CP charging. Excessive glitches on VIN will affect the output voltage VOUT. CIN is typically 10X greater than CP. (3) CS should be small to ensure that the ripple frequency is high, but at least 2x greater than CP, otherwise the ripple amplitude will be very high. Reducing the value of CS will increase the ripple frequency. Examples of CS ripple frequencies TA=25C) are shown in following tables: (CS=10F, (4) COUT, the optional VOUT capacitor, helps minimize noise and improve load regulation; 0.1F to 100F is recommended. (5) CBYP, the optional bypass capacitor helps reduce noise in the LDO; 0.1F is recommended. After choosing external component values, check insystem performance (at min/max VIN, max temperature, and min/max IOUT). See the troubleshooting guide on next page for tips if there are problems. Charge Pump Noise The charge pump is 'digital' in operation and can produce digital noise at both the free-running frequency and at the ripple frequency. To minimize noise, PCB grounding is important! This part requires short, low-impedance ground connections for DGND (pin 1), GND (pin 4), the VIN decoupling capacitor (pin 2), the CS capacitor (pin 3), the Bypass decoupling capacitor (pin 5) and the VOUT decoupling capacitor (pin 8). All decoupling capacitors and the CS capacitor should be low-ESR ceramics. The CP capacitor needs to be low-ESR.
VIN
3.14 3.60 4.50 5.50
CP = 0.47F
IOUT
15mA 15mA 70mA 70mA
CS Frequency
46kHz 35kHz 76kHz 56kHz
CP = 1.0F
VIN 3.14 3.60 4.50 5.50 IOUT 100mA 100mA 100mA 100mA CS Frequency
250kHz 110kHz 67kHz 49kHz
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
9
PRELIMINARY CM4072
Efficiency The power efficiency in % of the combined charge pump and LDO is approximately: 100 x (VOUT) / (VIN x 2) Warnings Power Dissipation The dissipation of the part is approximately: ((VIN x 2) - VOUT) x IOUT The TDFN-10 package heats at a rate of about 200C/ W (JA). Note that this value is approximate because it depends upon the copper tracks and ground planes on the pcb. If VIN = 5V and IOUT = 100mA then the power dissipation will be approximately 500mW. Multiplying this by the JA gives an internal temperature about 100C higher than the ambient temperature (TA). If the TA is 70C then the internal temperature will be approximately 170C which will trigger the overtemperature circuit and lead to power-down. Internal temperature = Ambient temperature + ( JA x Power dissipation ) (Must be less than 170C) Note that the evaluation PCB has a JA of less than 150C/W, based upon measured performance. How to Reduce the Power Dissipation of the Part and How to Get More Than 100mA If VIN = 5V typ., then the charge pump / LDO combination is capable of providing more than 100mA. The only problem is power dissipation. If the input voltage is lowered using an external diode then the output current can be increased without causing the part to overheat. The circuit below illustrates an example of how to increase the output current. The charge pump output VCP (pin 3) must not be shorted to GND or held below its internally-set voltage while the part is powered. This usually results in the destruction of the part. With VIN = 5V, the maximum current that can be continuously drawn from VCP is approximately 100mA dc. Never short CP+ (pin 9) to CP- (pin 10). This will cause large currents to flow from VIN to DGND through the part, usually causing its destruction. This will happen even if EN_CP and EN_LDO are off. Troubleshooting Guide 1) Is the output voltage drooping under heavy loads? Perhaps the charge pump cannot provide the necessary current. Try increasing the value of CP. If that does not work, then, is VIN too low? Is VIN dropping during the CP charging cycle? If VIN is not suitably decoupled and drops below 3.1V then the available current will be very low. 2) Is the output voltage oscillating between 5V and 0V? The part may be reaching its overtemperature limit. Reduce current consumption, reduce JA or add an external diode on the input to reduce VIN. 3. Is the part too noisy? Try increasing the value (or reducing ESR) of CS, CIN, CS, CB. At minimum current the charge pump ripple frequency will be low. If VOUT noise is at the charge pump ripple frequency, then change values of CP and CS. Reducing the input voltage VIN will reduce the charge pump ripple frequency noise on VOUT. 4. Will the part power up? Pin 6 must be HIGH to power up. Even if pin 7 is HIGH, pin 6 must also be high to power up. 5. Can the cold start power-up time be reduced? Yes, by reducing the value of the CBYP. Using this circuit, IOUT can be 200mA if VIN = 4.75V, and yet the part will not overheat even if VIN = 5.25V, IOUT=200mA and the ambient temperature is 85C.
10%
5V
1N4006 + Ci 10F + CBYP + 0.1F CS 3F
1 2 3 4 5
10 9
CP + 1F
CM4072 TDFN-10
8 7 6
VOUT +C O 0.1F
Enable
(c) 2005 California Micro Devices Corp. All rights reserved.
10
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
11/08/05
PRELIMINARY CM4072
Mechanical Details
TDFN-10 Mechanical Specifications Dimensions for the CM4072-50DF/DE supplied in a 10-lead TDFN package are presented below. For complete information on the TDFN-10, see the California Micro Devices TDFN Package Information document. Mechanical Package Diagrams
D
10 9 8 7 6
PACKAGE DIMENSIONS
Package JEDEC No. Leads Dim. A A1 A2 A3 b D D2 E E2 e K L # per tape and reel 0.20 0.20 0.30 0.40 1.40 2.20 0.18 Millimeters Min 0.70 0.00 0.45 Nom 0.75 0.02 0.55 0.20 0.25 3.00 2.30 3.00 1.50 0.50 0.008 0.008 0.012 0.016 Pin 1 ID
C0.35
TDFN MO-229 (Var. WEED-3) 10 Inches Max 0.80 0.05 0.65 0.30 2.40 1.60 Min 0.028 0.000 0.018 0.007 0.087 0.055 Nom 0.030 0.001 0.022 0.008 0.010 0.118 0.091 0.118 0.060 0.020 1 2 3 4 5 0.063 0.094 0.012
0.08 C
E
Pin 1 Marking
Max 0.031 0.002 0.026
0.10 C
12345 TOP VIEW
A1
SIDE VIEW
A
A3 A2
3000 pieces
Controlling dimension: millimeters
This package is compliant with JEDEC standard MO-229, variation WEED-3 with exception of the "D2" and "E2" dimensions as called out in the table above.
GND PAD
D2
E2
L
K e
10
9
8
7
6
b
8X
BOTTOM VIEW
0.10
M
CAB
Package Dimensions for 10-Lead TDFN
(c) 2005 California Micro Devices Corp. All rights reserved. 11/08/05
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.cmd.com
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